TechTalk: End of CMOS miniaturization and technology development before and after

In this talk, Prof. Dr. Hiroshi Iwai shared his thoughts and recent knowledge on the progress of semiconductor technologies. Prof. Iwai is the Vice Dean and a Distinguished Chair Professor of International College of Semiconductor Technology, National Chiao Tung University, Hsinchu, Taiwan, and a Professor Emeritus, Tokyo Institute of Technology, Yokohama, Japan. 

As our technologically advanced society is practically driven by the progress of semiconductors in the recent years, demand for better CMOS technologies is ever increasing. To create better devices, CMOS miniaturization is essential. With smaller CMOS, we are able to create higher-performance electronic devices. 

Nonetheless, as the gate length of the CMOS circuit approaches the limit of 10nm, leakage current becomes an issue. Prof Iwai also hightlighted that the leakage current severely limited our ability to increase CMOS performance beyond this point. Still, the demand for better computing performance is ever increasing due to the rise of digitalization and industry 4.0. Thus, the CMOS industry is doing its best by squeezing as much MOSFET as they can fit in a limited area. In other words, the CMOS industry is racking up the density of CMOS by utilizing novel engineering technologies, such as vertical CMOS, and decreasing interconnect pitch. 

Prof Iwai predicted that the effort to optimize the desity of the MOSFET would continue for at least another 10 years, subject to the cost and market requirement. Additionally, the trends may change due to aggressive development in the semiconductor industry. 

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